Due to the use of PAM4 in PCIe® 6.0, the optimal receiver parameters are needed to achieve the best possible bit error rate in the RxLEQ Test. This video introduces the Return Path Optimization Function of the MP1900A. Link Training, BER/Jitter Tolerance Test, Tx LEQ Response Test, and new FEC debugging functions for PCIe® 6.0 Flit analysis are also presented.
Other content in this Stream
3:41Sequence Editor function of the Signal Quality Analyzer-R MP1900A
29:22PCI-SIG is finalizing the PCIe 6.0 standard to support the spread of AI and machine learning for DCI. PCIe 6.0 extends the PCIe 5.0 transmission speed from 32 to 64 GT/s by changing the modulation met

Explore 60-GHz millimeter-wave radar and sensor innovations, global regulation trends, detection capabilities, key applications, and technical challenges with practical testing solutions.

Anritsu characterizes PCIe 64 GT/s intra-pair skew, providing BER insights to guide PAM4 tolerance, simulation correlation, and next-gen PCIe design.

Learn how Anritsu evaluates intra-pair skew in PCIe & USB interfaces, its effect on BER, and methods to ensure high-speed digital signal quality.

Discover how Optical Transport Networks (OTNs) enable high-speed, low-latency, and scalable data transmission for AI, cloud, and IoT—powering next-gen networks with advanced error correction.
45:20PCI Express® (PCIe®) technology has long met the bandwidth and reliability demands of traditional high-performance data center computing, which is why it is being leveraged by the automobile industry
As a developer of automotive solutions leveraging PCIe technology, it is critical that you have the right technology to ensure your solutions are compliant.

Explore key signal integrity concepts like COM, eye patterns, crosstalk, and skew to tackle measurement challenges in today’s high-speed digital and RF systems.

This post explores why skew is becoming a bigger issue than ever, how it affects signal integrity, and how to measure and manage it with confidence.
3:57This is a demonstration video of the USB4 v2 compliance test using the MP1900A.

Get expert insights on testing strategies to accelerate design cycles and keep pace with advances in embedded systems, high-speed communication, and compact, high-speed electronics.
27:23This webinar focuses on Ethernet standard and Ethernet test of 400/800G including PAM4

The sampling oscilloscope is an ideal instrument for analyzing the eye pattern of these digital signals.
36:20PCIe 6.0 introduces Flow Control Unit (FLIT) encoding to allow forward error correction (FEC) on fixed-size packets. Stress testing PCIe hardware includes addressing this new protocol approach.

Read this Design World article to learn about the evolution of PCIe and the specifics of PCIe 6.0 as compared to previous specifications including the integration of PAM4 technology and FLIT encoding
33:21PAM4 BER & JTOL Test Solutions for PCIe 6 & Beyond with Anritsu
44:41Watch this webinar to learn about Automotive technology and testing in Telematics, Infotainment and ADAS, including 5G/cellular, server applications, and more
This paper outlines the enhanced PCIe 6.0 technologies, such as PAM4, Forward Error Correction (FEC) and link equalization
11:02Learn how to inject PN Differential Skew into a physical system using the MP1900A



