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Two-part webinar, focusing on PCIe® 6.0, led by top application engineers from Anritsu and Tektronix

Part 1: PAM4 BER & JTOL Test Solutions for PCIe 6 & Beyond with Anritsu

This session provides an overview of 32 Gbaud and above PAM4 BER test and Jitter tolerance test. It also includes Forward Error Correction (FEC) and burst errors analysis. Who should attend: Engineers working on PCIe 6.0 or 400/800GE applications.

Key Topics:

  • Complete PAM4 solution consisting of Anritsu BERT and Tektronix
  • PAM4 BERT Product Overview &Capabilities
  • PAM4 BER & Jitter Tolerance Test
  • FEC Burst Error Capture & Analysis

Part 2: What’s New in PCI Express 6.0 Specification and Physical Layer Testing Challenges with Tektronix

Key Topics:

  • Complete PAM4 solution consisting of Anritsu BERT and Tektronix
  • PCIe 6.0 specification updates
  • 64 GT/s PAM4 Base transmitter measurements
  • Measurement challenges for reference clock jitter, receiver calibration, and JTOL
Previous Flipbook
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