PCIe Gen 6 TX/RX Validation Workflow Live Demo at DesignCon 26

This DesignCon 2026 show‑floor video demonstrates a live PCIe Gen 6 TX/RX validation workflow using the MP1900 platform. The demo showcases PCIe Gen 6 link training and RX LEQ testing on an add‑in card, achieving a BER of 1E‑7 with margin beyond the compliance threshold. Automated stressed‑eye calibration is performed in partnership with a LeCroy oscilloscope. The demonstration validates full interoperability from PCIe Gen 3 through Gen 6, including 64 GT/s loopback operation, FBER measurements, and pass/fail assessment. Users can dynamically adjust transmitter presets, equalization, and channel impairments—such as sinusoidal jitter, random jitter, and DMI/CMI—to optimize margin and compliance performance in real time.

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Virtual Signalling Tester (Virtual ST)
Virtual Signalling Tester (Virtual ST)

This video introduces the Virtual ST solutions for Chipset and IoT devices development.